收藏本站
ATmega128
f XCK < -----------
External Clock
Synchronous Clock
Operation
External clocking is used by the synchronous slave modes of operation. The description in this
section refers to Figure 80 for details.
External clock input from the XCK pin is sampled by a synchronization register to minimize the
chance of meta-stability. The output from the synchronization register must then pass through
an edge detector before it can be used by the transmitter and receiver. This process introduces
a two CPU clock period delay and therefore the maximum external XCK clock frequency is lim-
ited by the following equation:
f OSC
4
Note that f osc depends on the stability of the system clock source. It is therefore recommended to
add some margin to avoid possible loss of data due to frequency variations.
W hen Synchronous mode is used (UMSEL = 1), the XCK pin will be used as either clock input
(slave) or clock output (master). The dependency between the clock edges and data sampling or
data change is the same. The basic principle is that data input (on RxD) is sampled at the oppo-
site XCK clock edge of the edge the data output (TxD) is changed.
Figure 81. Synchronous Mode XCK Timing.
UCPOL = 1
UCPOL = 0
XCK
RxD / TxD
XCK
Sample
RxD / TxD
Sample
The UCPOL bit UCRSC selects which XCK clock edge is used for data sampling and which is
used for data change. As Figure 81 shows, when UCPOL is zero the data will be changed at ris-
ing XCK edge and sampled at falling XCK edge. If UCPOL is set, the data will be changed at
falling XCK edge and sampled at rising XCK edge.
174
2467X–AVR–06/11
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
ATMEGA64RZAPV-10AU BUNDLE ATMEGA644P/AT86RF230 TQFP
ATP101-TL-H MOSFET P-CH 30V 25A ATPAK
ATP102-TL-H MOSFET P-CH 30V 40A ATPAK
ATP103-TL-H MOSFET P-CH 30V 55A ATPAK
ATP104-TL-H MOSFET P-CH 30V 75A ATPAK
ATP106-TL-H MOSFET P-CH 40V 30A ATPAK
ATP107-TL-H MOSFET P-CH 40V 50A ATPAK
ATP108-TL-H MOSFET P-CH 40V 70A ATPAK
相关代理商/技术参数
ATMEGA128RFA1-ZUR SL514 制造商:Atmel Corporation 功能描述:
ATMEGA128RFA1-ZUR00 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC REVF 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC REVF T&R - Bulk 制造商:Atmel from Components Direct 功能描述:ATMEL ATMEGA128RFA1-ZUR00 MICROCONTROLLERS (MCU) 制造商:Atmel 功能描述:Atmel ATMEGA128RFA1-ZUR00 Microcontrollers (MCU) 制造商:Atmel Corporation 功能描述:MCU AVR 2.4GHZ 128K FLASH 64VQFN 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC Revision F 制造商:Atmel 功能描述:2.4GHZ 802.15.4 128K SOC REVF
ATMEGA128RFR2-ZF 功能描述:IC RF TXRX+MCU 802.15.4 64-VFQFN 制造商:microchip technology 系列:- 包装:托盘 零件状态:在售 类型:TxRx + MCU 射频系列/标准:802.15.4 协议:Zigbee? 调制:DSSS， O-QPSK 频率:2.4GHz 数据速率（最大值）:2Mbps 功率 - 输出:3.5dBm 灵敏度:-100dBm 存储容量:128kB 闪存，4kB EEPROM，16kB SRAM 串行接口:I2C，JTAG，SPI，USART GPIO:35 电压 - 电源:1.8 V ~ 3.6 V 电流 - 接收:5mA ~ 12.5mA 电流 - 传输:8mA ~ 14.5mA 工作温度:-40°C ~ 125°C 封装/外壳:64-VFQFN 裸露焊盘 标准包装:260
ATMEGA128RFR2-ZFR
ATMEGA128RFR2-ZU 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC IND 85C - Bulk
ATMEGA128RFR2-ZUR 制造商:Atmel Corporation 功能描述:2.4GHZ 802.15.4 128K SOC 85C T&R - Tape and Reel
ATMEGA128RZAV-8AU 功能描述:射频微控制器 - MCU AVR Z-Link Bundle RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:Si100x 数据总线宽度:8 bit 最大时钟频率:24 MHz 程序存储器大小:64 KB 数据 RAM 大小:4 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LGA-42 安装风格:SMD/SMT 封装:Tube
ATMEGA128RZAV-8MU 功能描述:射频微控制器 - MCU AVR Z-Link Bundle RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:Si100x 数据总线宽度:8 bit 最大时钟频率:24 MHz 程序存储器大小:64 KB 数据 RAM 大小:4 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LGA-42 安装风格:SMD/SMT 封装:Tube